Generally, a metal oxide semiconductor field effect transistor (MOSFET) includes a gate electrode, which is formed on a semiconductor substrate and insulated by a thin gate insulating film, and source/drain regions formed on both sides of the gate electrode. When an appropriate bias voltage is applied to the gate electrode of the MOSFET, a channel region is formed under the gate insulating film. That is, the channel region may be formed by appropriately controlling the bias voltage applied to the gate electrode of the MOSFET.
As the integration density of semiconductor memory devices increases, memory cells are increasingly becoming smaller and faster to meet market needs. Accordingly, various methods of fabricating semiconductor devices with better performance while overcoming the limitations created by the increased integration density and speed are being studied. In particular, studies are being conducted on methods of increasing mobility of electrons or holes to implement a high-performance semiconductor device.
One of the methods of increasing mobility of electrons or holes is to apply physical stress to a channel region and thus modify the structure of an energy band of the channel region. For example, if tensile stress is applied to a channel region of an N-type transistor, the performance of the N-type transistor is enhanced. Also, the performance of a P-type transistor can be enhanced by applying compressive stress to its channel region.